; Miscellaneous IR array control routines, customized for John Monnier

POWER_OFF
	JSR	<CLEAR_SWITCHES		; Clear switches and DACs
	BSET	#LVEN,X:HDR 
	BSET	#HVEN,X:HDR 
	JMP	<FINISH

; Start power-on cycle
POWER_ON
	JSR	<CLEAR_SWITCHES		; Clear all analog switches
	JSR	<PON			; Turn on the power control board
	JCLR	#PWROK,X:HDR,PWR_ERR	; Test if the power turned on properly
	MOVE	#TST_RCV,R0		; For testing only, don't reset array
	MOVE	R0,X:<IDL_ADR
	MOVE	#CONT_RST,R0		; Put controller in continuous readout
	MOVE	R0,X:<IDL_ADR		;   state
	JMP	<FINISH

; The power failed to turn on because of an error on the power control board
PWR_ERR	BSET	#LVEN,X:HDR		; Turn off the low voltage emable line
	BSET	#HVEN,X:HDR		; Turn off the high voltage emable line
	JMP	<ERROR

; Now ramp up the low voltages (+/- 6.5V, 16.5V) and delay them to turn on
PON	BSET	#CDAC,X:<LATCH		; Disable clearing of DACs
	MOVEP	X:LATCH,Y:WRLATCH	; Write it to the hardware
	BCLR	#LVEN,X:HDR		; LVEN = Low => Turn on +/- 6.5V, 
	MOVE	Y:<PWR_DLY,A		;   +/- 16.5V
	JSR	<MILLISEC_DELAY

; Write all the bias voltages to the DACs
SET_BIASES
	BSET	#3,X:PCRD		; Turn on the serial clock
	BCLR	#1,X:<LATCH		; Separate updates of clock driver
	MOVE    #<ZERO_BIASES,R0	; Get starting address of DAC values
	JSR     <SET_DAC		; Write it to the hardware
	MOVE	X:<THREE,A
	JSR	<MILLISEC_DELAY
	BSET	#ENCK,X:<LATCH		; Enable clock and DAC output switches
	MOVEP	X:LATCH,Y:WRLATCH

; Turn on Vdd = digital power unit cell to the IR array
	MOVE	Y:VDD,A			; pin #5 = Vdd = array digital power
	JSR	XMIT_A_WORD
	MOVE	Y:<VDD_DLY,A		; Delay for the IR array to settle
	JSR	<MILLISEC_DELAY

	MOVE	#<DC_BIASES,R0		; Get starting address of DAC values
	JSR	<SET_DAC
	MOVE	X:<THREE,A		; Delay three millisec to settle
	JSR	<MILLISEC_DELAY

; Set clock driver DACs
	MOVE	#<DACS,R0		; Get starting address of DAC values
	JSR	<SET_DAC
	JSR	<PAL_DLY

; Turn continuous reset mode on, disable the SSI, and return 
	BCLR	#3,X:PCRD		; Turn the serial clock off
	RTS

SET_BIAS_VOLTAGES
	JSR	<SET_BIASES
	JMP	<FINISH

CLR_SWS	JSR	<CLEAR_SWITCHES
	JMP	<FINISH

CLEAR_SWITCHES
	BSET	#3,X:PCRD	; Turn the serial clock on
	MOVE	#$0C3000,A	; Value of integrate speed and gain switches
	CLR	B
	MOVE	#$100000,X0	; Increment over board numbers for DAC writes
	MOVE	#$001000,X1	; Increment over board numbers for WRSS writes
	DO	#15,L_VIDEO	; Fifteen video processor boards maximum
	JSR	<XMIT_A_WORD	; Transmit A to TIM-A-STD
	ADD	X0,A
	MOVE	B,Y:WRSS
	JSR	<PAL_DLY	; Delay for the serial data transmission
	ADD	X1,B
L_VIDEO	
	BCLR	#CDAC,X:<LATCH		; Clear the DACs
	BCLR	#ENCK,X:<LATCH		; Disable clock and DAC output switches
	MOVEP	X:LATCH,Y:WRLATCH 	; Execute these two operations
	BCLR	#3,X:PCRD		; Turn the serial clock off
	RTS

; Start the exposure timer and monitor its progress
EXPOSE	MOVE	X:<EXPOSURE_TIME,B
	TST	B			; Special test for zero exposure time
	JEQ	<END_EXP		; Don't even start an exposure
	SUB	#1,B			; Timer counts from X:TCPR0+1 to zero
	BSET	#TIM_BIT,X:TCSR0	; Enable the timer #0
	MOVE	B,X:TCPR0
CHK_RCV	MOVE	#COM_BUF,R3		; The beginning of the command buffer
	JCLR    #EF,X:HDR,CHK_TIM	; Simple test for fast execution
	JSR	<GET_RCV		; Check for an incoming command
	JCS	<PRC_RCV		; If command is received, go check it
CHK_TIM	JCLR	#TCF,X:TCSR0,CHK_RCV	; Wait for timer to equal compare value
END_EXP	BCLR	#TIM_BIT,X:TCSR0	; Disable the timer
	JMP	(R7)			; This contains the return address

; Start the exposure, expose, and initiate the IR array readout
START_EXPOSURE				; Test for continuous readout
	MOVE	Y:<NCOADDS,A
	CMP	#1,A
	JGT	<SETUP_CONT_RD
	JCLR	#ST_CNRD,X:STATUS,INIT_PCI_BOARD ; We are in single mode
	BCLR	#ST_CNRD,X:<STATUS
	JMP	<INIT_FRAME_COUNT	; Must send IFC if exiting cont. mode

; Initialize the coaddition sequence	
SETUP_CONT_RD
	BSET	#ST_CNRD,X:<STATUS	; We are in continous readout mode
	MOVE	#<READ_ON,R0		; Turn PICNIC Read line ON
	JSR	<CLOCK

INIT_FRAME_COUNT
	JSR	<WAIT_TO_FINISH_CLOCKING
	MOVE	#$020102,B		; Initialize the PCI frame counter
	JSR	<XMT_WRD
	MOVE	#'IFC',B
	JSR	<XMT_WRD
	MOVE	#0,X0
	MOVE	X0,Y:<ICOADD		; Initialize the coaddition counter
	MOVE	X0,Y:<I_FPR		; Initialize the reads per reset counter
	JMP	<INIT_PCI_BOARD
	
; Start up the next frame of the coaddition series
NEXT_COADD
	MOVE	Y:<ICOADD,A		; Get the # of frames coadded so far
	ADD	#1,A
	MOVE	Y:<NCOADDS,X0		; See if we've coadded enough frames
	MOVE	A1,Y:<ICOADD		; Increment the coaddition frame counter
	CMP	X0,A
	JGE	<CONTINUE_READ		; End of coaddition sequence

	MOVE	Y:<IBUFFER,A		; Get the position in the buffer
	ADD	#1,A
	MOVE	Y:<N_FPB,X0
	MOVE	A1,Y:<IBUFFER
	CMP	X0,A
	JLT	<TST_RST		; Test if the frame buffer is full

INIT_PCI_BOARD				; Initialize PCI pointer if full
	MOVE	#0,X0
	MOVE	X0,Y:<IBUFFER		; IBUFFER counts from 0 to N_FPB
	MOVE	#$020102,B
	JSR	<XMT_WRD
	MOVE	#'IIA',B
	JSR	<XMT_WRD

; Test if a reset of the IR array is needed
TST_RST	MOVE	Y:<I_FPR,A		; Get the "frames per reset" counter
	ADD	#1,A
	MOVE	Y:<N_FPR,X0
	MOVE	A1,Y:<I_FPR
	CMP	X0,A
	JLT	<TRIGGER		; Test if need to reset the array
	MOVE	#0,X0
	MOVE	X0,Y:<I_FPR		; Initialize the reads per reset counter
	JSR	<RST_FPA		; Reset the array

; Sample the EXT_IN0 bit, waiting for a trigger, which is high true.
TRIGGER	JCLR	#ST_SYNC,X:<STATUS,AGAIN
WAIT_RD	JCLR	#EXT_IN0,X:HDR,WAIT_RD	; Wait for the trigger to go high
	REP	#6			; Wait 150 nsec, as a noise filter
	NOP
	JCLR	#EXT_IN0,X:HDR,WAIT_RD	; If trigger is low start over

; Begin the exposure and one or two readouts depending on the CDS setting
AGAIN	JCLR	#ST_CDS,X:<STATUS,EX_STRT
	JSR	<RD_ARRAY		; Read before expose
	BCLR	#ST_RDC,X:<STATUS	; Set status to not reading out
	JCLR	#ST_RD,X:<STATUS,EX_STRT
	MOVE	#<READ_OFF,R0		; Turn PICNIC Read line OFF
	JSR	<CLOCK
EX_STRT	MOVE	#EXP_END,R7
	JMP	<EXPOSE
EXP_END	JSR	<RD_ARRAY		; Read after expose
	BCLR	#ST_RDC,X:<STATUS	; Set status to not reading out
	JCLR	#ST_RD,X:<STATUS,RDA_END
	MOVE	#<READ_OFF,R0		; Turn PICNIC Read line OFF
	JSR	<CLOCK

; Check for a command at the end of readout. Only ABORT should be issued.
RDA_END	MOVE	#<COM_BUF,R3
	JSR	<GET_RCV		; Was a command received?
	JCS	<CHK_ABORT_COMMAND	; If yes, see if its an abort command

; Check for coaddition mode
CHK_ADD	MOVE	Y:<NCOADDS,A
	CMP	#1,A
	JLE	<CONTINUE_READ	
	BCLR	#ST_RDC,X:<STATUS	; Set status to not reading out
	JSR	<WAIT_TO_FINISH_CLOCKING

; Delay a minimum of 70 microsec for the pixel data to be written to the PCI bus
	MOVE	#1000000,X0		; = 100 microsec, #100 per microsec
	DO	X0,L_RDDLY
	NOP
L_RDDLY
	JMP	<NEXT_COADD

CONTINUE_READ
	JMP	<START

; Reset array, as a subroutine
RST_FPA	MOVE	#NO_CHK,R5	; Don't check for incoming commands
	JSR	<RESET_ARRAY	; Reset the array
	MOVE	Y:<RST_DLY,A	; Enter reset delay into timer
	JSR	<MILLISEC_DELAY	; Let the reset signal settle down
	RTS

; ****************  End of START_EXPOSURE routine  **********************

; Set the desired exposure time
SET_EXPOSURE_TIME
	MOVE	X:(R3)+,Y0
	MOVE	Y0,X:EXPOSURE_TIME
	MOVEP	X:EXPOSURE_TIME,X:TCPR0
	JMP	<FINISH

; Read the time remaining until the exposure ends
READ_EXPOSURE_TIME
	MOVE	X:TCR0,Y1		; Read elapsed exposure time
	JMP	<FINISH1

; Pause the exposure - close the shutter, and stop the timer
PAUSE_EXPOSURE
	MOVEP	X:TCR0,X:ELAPSED_TIME	; Save the elapsed exposure time
	BCLR    #TIM_BIT,X:TCSR0	; Disable the DSP exposure timer
	JMP	<FINISH

; Resume the exposure - open the shutter if needed and restart the timer
RESUME_EXPOSURE
	BSET	#TRM,X:TCSR0		; To be sure it will load TLR0
	MOVEP	X:TCR0,X:TLR0		; Restore elapsed exposure time
	BSET	#TIM_BIT,X:TCSR0	; Re-enable the DSP exposure timer
	JMP	<FINISH

; See if the command issued during readout is a 'ABR'. If not continue readout
CHK_ABORT_COMMAND
	MOVE	X:(R3)+,X0		; Get candidate header
	MOVE	#$000202,A 
	CMP	X0,A
	JNE	<RD_CONT
WT_COM	JSR	<GET_RCV		; Get the command
	JCC	<WT_COM
	MOVE	X:(R3)+,X0		; Get candidate header
	MOVE	#'ABR',A 
	CMP	X0,A
	JEQ	<RDCCD_END_ABORT
RD_CONT	MOVE	#<COM_BUF,R3		; Continue reading out the CCD
	MOVE	R3,R4
	JMP	<CHK_ADD

; Special ending after abort command to send a 'DON' to the host computer
RDCCD_END_ABORT
	JCLR	#ST_RDC,X:<STATUS,ABORT_EXPOSURE
	MOVE	X:<ONE,A
	JSR	<MILLISEC_DELAY		; Wait one millisec
	JCLR	#IDLMODE,X:<STATUS,NO_IDL2 ; Don't idle after readout
	MOVE	#CONT_RST,R0
	MOVE	R0,X:<IDL_ADR
	JMP	<RDC_E2
NO_IDL2	MOVE	#TST_RCV,R0
	MOVE	R0,X:<IDL_ADR
RDC_E2	JSR	<WAIT_TO_FINISH_CLOCKING
	BCLR	#ST_RDC,X:<STATUS	; Set status to not reading out
	MOVE	#0,X0
	MOVE	X0,Y:<NCOADDS		; Terminate coaddition
	MOVE	#$000202,X0		; Send 'DON' to the host computer
	MOVE	X0,X:<HEADER
	JMP	<FINISH

; Abort exposure - close the shutter, stop the timer and resume idle mode
ABORT_EXPOSURE
	BCLR    #TIM_BIT,X:TCSR0	; Disable the DSP exposure timer
	JMP	<RDA_END

; Generate a synthetic image by simply incrementing the pixel counts
SYNTHETIC_IMAGE
	CLR	A
	DO      Y:<NROWS,LPR_TST      	; Loop over each line readout
	DO      Y:<NCOLS,LSR_TST	; Loop over number of pixels per line
	REP	#20			; #20 => 1.0 microsec per pixel
	NOP
	ADD	#1,A			; Pixel data = Pixel data + 1
	NOP
	MOVE	A,B
	JSR	<XMT_PIX		;  transmit them
	NOP
LSR_TST	
	NOP
LPR_TST	
        JMP     <RDA_END		; Normal exit

; Transmit the 16-bit pixel datum in B1 to the host computer
XMT_PIX	ASL	#16,B,B
	NOP
	MOVE	B2,X1
	ASL	#8,B,B
	NOP
	MOVE	B2,X0
	NOP
	MOVEP	X1,Y:WRFO
	MOVEP	X0,Y:WRFO
	RTS

; Alert the PCI interface board that images are coming soon
PCI_READ_IMAGE
	MOVE	#$020104,B		; Send header word to the FO transmitter
	JSR	<XMT_WRD
	MOVE	#'RDA',B
	JSR	<XMT_WRD
	MOVE	Y:<NCOLS,B		; Number of columns to read
	JSR	<XMT_WRD
	MOVE	Y:<NROWS,B		; Number of rows to read	
	JCLR	#ST_CDS,X:<STATUS,NO_CDS3
	LSR	B
NO_CDS3	JSR	<XMT_WRD
	RTS

; Wait for the clocking to be complete before proceeding
WAIT_TO_FINISH_CLOCKING
	JSET	#SSFEF,X:PDRD,*		; Wait for the SS FIFO to be empty	
	RTS

; This MOVEP instruction executes in 30 nanosec, 20 nanosec for the MOVEP,
;   and 10 nanosec for the wait state that is required for SRAM writes and 
;   FIFO setup times. It looks reliable, so will be used for now.

; Core subroutine for clocking
CLOCK
	JCLR	#SSFHF,X:HDR,*		; Only write to FIFO if < half full
	NOP
	JCLR	#SSFHF,X:HDR,CLOCK	; Guard against metastability
	MOVE    Y:(R0)+,X0      	; # of waveform entries 
	DO      X0,CLK1                 ; Repeat X0 times
	MOVEP	Y:(R0)+,Y:WRSS		; 30 nsec Write the waveform to the SS 	
CLK1
	NOP
	RTS                     	; Return from subroutine

; Delay for serial writes to the PALs and DACs by 8 microsec
PAL_DLY	DO	#800,DLY	 ; Wait 8 usec for serial data transmission
	NOP
DLY	NOP
	RTS

; Let the host computer read the controller configuration
READ_CONTROLLER_CONFIGURATION
	MOVE	Y:<CONFIG,Y1		; Just transmit the configuration
	JMP	<FINISH1

; Set a particular DAC numbers, for setting DC bias voltages, clock driver  
;   voltages and video processor offset
;
; SBN  #BOARD  #DAC  ['CLK' or 'VID']  voltage
;
;				#BOARD is from 0 to 15
;				#DAC number
;				#voltage is from 0 to 4095

SET_BIAS_NUMBER			; Set bias number
	BSET	#3,X:PCRD	; Turn on the serial clock
	MOVE	X:(R3)+,A	; First argument is board number, 0 to 15
	REP	#20
	LSL	A
	NOP
	MOVE	A,X0
	MOVE	X:(R3)+,A	; Second argument is DAC number
	REP	#14
	LSL	A
	OR	X0,A
	MOVE	X:(R3)+,B	; Third argument is 'VID' or 'CLK' string
	MOVE	#'VID',X0
	CMP	X0,B
	JNE	<CLK_DRV
	BSET	#19,A1		; Set bits to mean video processor DAC
	NOP
	BSET	#18,A1
	JMP	<VID_BRD
CLK_DRV	MOVE	#'CLK',X0
	CMP	X0,B
	JNE	<ERR_SBN
VID_BRD	MOVE	A,X0
	MOVE	X:(R3)+,A	; Fourth argument is voltage value, 0 to $fff
	MOVE	#$000FFF,Y0	; Mask off just 12 bits to be sure
	AND	Y0,A
	OR	X0,A
	JSR	<XMIT_A_WORD	; Transmit A to TIM-A-STD
	JSR	<PAL_DLY	; Wait for the number to be sent
	BCLR	#3,X:PCRD	; Turn the serial clock off
	JMP	<FINISH
ERR_SBN	MOVE	X:(R3)+,A	; Read and discard the fourth argument
	BCLR	#3,X:PCRD	; Turn the serial clock off
	JMP	<ERROR

; Specify the MUX value to be output on the clock driver board
; Command syntax is  SMX  #clock_driver_board #MUX1 #MUX2
;				#clock_driver_board from 0 to 15
;				#MUX1, #MUX2 from 0 to 23

SET_MUX	BSET	#3,X:PCRD	; Turn on the serial clock
	MOVE	X:(R3)+,A	; Clock driver board number
	REP	#20
	LSL	A
	MOVE	#$003000,X0
	OR	X0,A
	NOP
	MOVE	A,X1		; Move here for storage

; Get the first MUX number
	MOVE	X:(R3)+,A	; Get the first MUX number
	JLT	ERR_SM1
	MOVE	#>24,X0		; Check for argument less than 32
	CMP	X0,A
	JGE	ERR_SM1
	MOVE	A,B
	MOVE	#>7,X0
	AND	X0,B
	MOVE	#>$18,X0
	AND	X0,A
	JNE	<SMX_1		; Test for 0 <= MUX number <= 7
	BSET	#3,B1
	JMP	<SMX_A
SMX_1	MOVE	#>$08,X0
	CMP	X0,A		; Test for 8 <= MUX number <= 15
	JNE	<SMX_2
	BSET	#4,B1
	JMP	<SMX_A
SMX_2	MOVE	#>$10,X0
	CMP	X0,A		; Test for 16 <= MUX number <= 23
	JNE	<ERR_SM1
	BSET	#5,B1
SMX_A	OR	X1,B1		; Add prefix to MUX numbers
	NOP
	MOVE	B1,Y1

; Add on the second MUX number
	MOVE	X:(R3)+,A	; Get the next MUX number
	JLT	<ERROR
	MOVE	#>24,X0		; Check for argument less than 32
	CMP	X0,A
	JGE	<ERROR
	REP	#6
	LSL	A
	NOP
	MOVE	A,B
	MOVE	#$1C0,X0
	AND	X0,B
	MOVE	#>$600,X0
	AND	X0,A
	JNE	<SMX_3		; Test for 0 <= MUX number <= 7
	BSET	#9,B1
	JMP	<SMX_B
SMX_3	MOVE	#>$200,X0
	CMP	X0,A		; Test for 8 <= MUX number <= 15
	JNE	<SMX_4
	BSET	#10,B1
	JMP	<SMX_B
SMX_4	MOVE	#>$400,X0
	CMP	X0,A		; Test for 16 <= MUX number <= 23
	JNE	<ERROR
	BSET	#11,B1
SMX_B	ADD	Y1,B		; Add prefix to MUX numbers
	NOP
	MOVE	B1,A
	JSR	<XMIT_A_WORD	; Transmit A to TIM-A-STD
	JSR	<PAL_DLY	; Delay for all this to happen
	BCLR	#3,X:PCRD	; Turn the serial clock off
	JMP	<FINISH
ERR_SM1	MOVE	X:(R3)+,A
	BCLR	#3,X:PCRD	; Turn the serial clock off
	JMP	<ERROR

; Write a number to an analog board over the serial link
WR_BIAS	BSET	#3,X:PCRD	; Turn on the serial clock
	JSR	<PAL_DLY
	JSR	<XMIT_A_WORD	; Transmit it to TIM-A-STD
	JSR	<PAL_DLY
	BCLR	#3,X:PCRD	; Turn off the serial clock
	JSR	<PAL_DLY
	RTS

; Read DAC values from a table, and write them to the DACs
SET_DAC	DO      Y:(R0)+,L_DAC		; Repeat Y:(R0)+ times
	MOVE	Y:(R0)+,A		; Read the table entry
	JSR	<XMIT_A_WORD		; Transmit it to TIM-A-STD
	NOP
L_DAC	RTS
	
; Short delay for the array to settle down after a global reset
MILLISEC_DELAY
	TST	A
	JNE	<DLY_IT
	RTS
DLY_IT	MOVEP	#0,X:TLR0		; Load 0 into counter timer
	BSET	#TIM_BIT,X:TCSR0	; Enable the timer #0
	MOVE	A,X:TCPR0		; Desired elapsed time
CNT_DWN	JCLR	#TCF,X:TCSR0,CNT_DWN	; Wait here for timer to count down
	BCLR	#TIM_BIT,X:TCSR0
	RTS

; Put PCI board in reading image out mode to block commands to the timing board
READING_IMAGE_ON
	MOVE	#$020102,B		; Send header word to the FO transmitter
	JSR	<XMT_WRD
	MOVE	#'RDI',B
	JSR	<XMT_WRD
	RTS

; Select which readouts to readout - 'SOS'  Amplifier_name  
;	Amplifier_name = 0, 1, 2, 3 or 'ALL'

SELECT_OUTPUT_SOURCE
	MOVE	X:(R3)+,X0	; Get amplifier(s) name or number
	MOVE	X0,Y:<OS
	MOVE	#'ALL',A	; All amplifiers = readouts #0 to #3
	CMP	X0,A
	JNE	<CHK_0
	MOVE	#$00F0C0,X0
	JMP	<SOS
CHK_0	MOVE	#>0,A		; Amplifier 0 = Upper Left
	CMP	X0,A
	JNE	<CHK_1
	MOVE	#$00F000,X0
	JMP	<SOS
CHK_1	MOVE	#>1,A		; Amplifier 1 = Upper Right
	CMP	X0,A	
	JNE	<CHK_2
	MOVE	#$00F041,X0
	JMP	<SOS
CHK_2	MOVE	#>2,A		; Amplifier 2 = Lower Right
	CMP	X0,A
	JNE	<CHK_3
	MOVE	#$00F082,X0
	JMP	<SOS
CHK_3	MOVE	#>3,A		; Amplifier 3 = Lower Left
	CMP	X0,A
	JNE	<ERROR
	MOVE	#$00F0C3,X0

SOS	MOVE	X0,Y:SXMIT0
	MOVE	X0,Y:SXMIT1
	MOVE	X0,Y:SXMIT2
	MOVE	X0,Y:SXMIT3
	MOVE	X0,Y:SXMIT00
	JMP	<FINISH

; Special continuous readout commands
SET_NUMBER_OF_COADDS
	MOVE	X:(R3)+,X0
	MOVE	X0,Y:<NCOADDS
	JMP	<FINISH	

SET_NUMBER_OF_FRAMES_PER_BUFFER
	MOVE	X:(R3)+,X0
	MOVE	X0,Y:<N_FPB
	JMP	<FINISH	

; Set number of readout times per pixel
SET_NUM_READS
	MOVE	X:(R3)+,X0
	MOVE	X0,Y:<NUM_RDS
	JMP	<FINISH

SET_NUMBER_OF_FRAMES_PER_RESET
	MOVE	X:(R3)+,X0
	MOVE	X0,Y:<N_FPR
	JMP	<FINISH	

; Subarray readout - specify region to read
SPECIFY_SUB_ARRAY
	MOVE	X:(R3)+,X0
	MOVE	X0,Y:<COL_OFFSET
	MOVE	X:(R3)+,X0
	MOVE	X0,Y:<ROW_OFFSET
	JMP	<FINISH	

; Set trigger mode, to start readout on trigger true. 
SET_TRIGGER_MODE
	JCLR	#0,X:(R3)+,NO_TRIGGER	; 1 for external triggering 0 for not
	BSET	#ST_SYNC,X:<STATUS
	JMP	<FINISH
NO_TRIGGER
	BCLR	#ST_SYNC,X:<STATUS
	JMP	<FINISH

; Set correlated double sample (CDS) mode, to readout before and after exposure 
SET_CDS_MODE
	JCLR	#0,X:(R3)+,NO_CDS4	; 1 for CDS, 0 for not
	BSET	#ST_CDS,X:<STATUS
	JMP	<FINISH
NO_CDS4
	BCLR	#ST_CDS,X:<STATUS
	JMP	<FINISH

; Turn the PICNIC signal READ on before an exposure and off after it?
SET_READ_MODE
	JCLR	#0,X:(R3)+,NO_READ_ON_AND_OFF	; 1 for turning it on and off
	BSET	#ST_RD,X:<STATUS
	JMP	<FINISH
NO_READ_ON_AND_OFF
	BCLR	#ST_RD,X:<STATUS
	JMP	<FINISH

